gEDA-user: gschem with cairo rendering

[Dan McMahill]

der Mouse wrote:

>> The main reason it wouldn't be viable would be if you were running on
>> hardware which isn't fast enough to be usable with that level of
>> graphics quality.
> 
> Which is likely true in my case.  I've done the rendering portion of
> the HID first, and it takes it nearly a minute to render tut1.pcb.
> It's likely I can speed that up some, but only some; I don't expect to
> ever get it below, say, five seconds, on this hardware.

You know... this reminds me of a tool I used to use many years ago. 
Back in the early  to mid 1990's I used a commercial CAD tool called 
Cadnetix for schematic capture and board layout.  It was quite usable on 
SS2's.  If you had a SS10 or SS20, you were in great shape.  It's not 
like the board's we were doing were small boards either.  This really 
makes me wonder what else may be going on inside the pcb core.  I would 
have thought that going back to a pure xlib hid would have the ability 
to make pcb feel pretty darn snappy especially on smaller layouts.

Is it the polygon dicer maybe?  I wonder if we need to have a way to 
"unpour" polygons to essentially drop them back to just displaying an 
outline and not doing any of the clipping until asked too by toggling 
the state of a polygon back to "poured".  Perhaps this would buy back a 
bunch of speed.

-Dan