gEDA-user: gnucap insists a bjt is not a bjt

Robert Butts r.butts2 at gmail.com
Mon Feb 25 18:08:45 EST 2008


I found my problem.  I guess you can't name a netname that goes into a
transistor base?  I took all netnames out and the simulation ran.  I haven't
added them back in oneby one to find the exact cause.

On Mon, Feb 25, 2008 at 1:41 PM, Robert Butts <r.butts2 at gmail.com> wrote:

> I made a simple differential amplifier with bjts.  When I try to simulate
> it gnucap keeps insisting the bjt is not a bjt.  I have tried different bjts
> and different spice models.
>
>
> Below is the output from gnetlist and attatched is the netlist with the
> simulation commands:
>
>
>
> ----------------------------------------------------------------------------------
>
> Internal netlist representation:
>
> component V1
>         pin 1 (+) Vin-plus
>                 V1 1 [1317]
>                 Q1 2 [2268]
>         pin 2 (-) Vin-minus
>                 V1 2 [1343]
>                 V2 1 [3763]
>                 Q2 2 [2773]
>
> component R3
>         pin 2 (2) 1
>                 R3 2 [1900]
>                 Q1 3 [2088]
>                 Q2 3 [2610]
>         pin 1 (1) -Vcc
>                 R3 1 [1909]
>
> component Q1
>         pin 1 (C) Vout-plus
>                 Q1 1 [2073]
>                 R1 1 [4097]
>         pin 3 (E) 1
>                 Q1 3 [2088]
>                 Q2 3 [2610]
>                 R3 2 [1900]
>         pin 2 (B) Vin-plus
>                 Q1 2 [2268]
>                 V1 1 [1317]
>
> component Q2
>         pin 1 (C) Vout-minus
>                 Q2 1 [2595]
>                 R2 1 [3940]
>         pin 3 (E) 1
>                 Q2 3 [2610]
>                 Q1 3 [2088]
>                 R3 2 [1900]
>         pin 2 (B) Vin-minus
>                 Q2 2 [2773]
>                 V1 2 [1343]
>                 V2 1 [3763]
>
> component SPECIAL
>         pin 1 (OUTPUT) Null net name
>                 Q2 1 [2595]
>                 R2 1 [3940]
>
> component SPECIAL
>         pin 1 (1) Null net name
>                 V2 2 [3754]
>
> component V2
>         pin 2 (2) GND
>                 V2 2 [3754]
>         pin 1 (1) Vin-minus
>                 V2 1 [3763]
>                 V1 2 [1343]
>                 Q2 2 [2773]
>
> component R2
>         pin 2 (2) Vcc
>                 R2 2 [3931]
>                 R1 2 [4088]
>         pin 1 (1) Vout-minus
>                 R2 1 [3940]
>                 Q2 1 [2595]
>
> component R1
>         pin 2 (2) Vcc
>                 R1 2 [4088]
>                 R2 2 [3931]
>         pin 1 (1) Vout-plus
>                 R1 1 [4097]
>                 Q1 1 [2073]
>
> component SPECIAL
>         pin 1 (1) Null net name
>                 R1 2 [4088]
>                 R2 2 [3931]
>
> component SPECIAL
>         pin 1 (1) Null net name
>                 R3 1 [1909]
>
> component SPECIAL
>         pin 1 (OUTPUT) Null net name
>                 Q1 1 [2073]
>                 R1 1 [4097]
>
>
> Using SPICE backend by SDB -- Version of 4.28.2007
> schematic-type = normal schematic
> found normal type schematic
> Make first pass through design and create list of all model files
> referenced.
> found file attribute for Q2.  File name =
> /home/rob/gaf/spice-files/2N3904.model
> In get-file-type, first-char = .
> File is new.  New file type is .MODEL
> Inserting /home/rob/gaf/spice-files/2N3904.model into list of known model
> files.
> found file attribute for Q1.  File name =
> /home/rob/gaf/spice-files/2N3904.model
> File has already been seen and entered into known model file list.
> Done creating file-info-list.
>
> Now process the items in model file list -- stick appropriate references
> to models in output SPICE file.
> Handling spice model file /home/rob/gaf/spice-files/2N3904.model
> Done processing items in model file list.
> Make second pass through design and write out a SPICE card for each
> component found.
> --- checking package = V2
>     device = VOLTAGE_SOURCE
> Found independent voltage source.  Refdes = V2
>   In write-net-names-on-component. . . .
>      pin-name = 1
>      pinnumber = 1
>      pinseq = 1
>      netname = Vin-minus
>   In write-net-names-on-component. . . .
>      pin-name = 2
>      pinnumber = 2
>      pinseq = 2
>      netname = 0
> --- checking package = Q2
>     device = 2N3904
>   In write-net-names-on-component. . . .
>      pin-name = 1
>      pinnumber = 1
>      pinseq = 1
>      netname = Vout-minus
>   In write-net-names-on-component. . . .
>      pin-name = 2
>      pinnumber = 2
>      pinseq = 2
>      netname = Vin-minus
>   In write-net-names-on-component. . . .
>      pin-name = 3
>      pinnumber = 3
>      pinseq = 3
>      netname = 1
> found file and model-name for Q2
> I'll deal with the file later . . .
> --- checking package = V1
>     device = vac
> Found independent voltage source.  Refdes = V1
>   In write-net-names-on-component. . . .
>      pin-name = 1
>      pinnumber = 1
>      pinseq = 1
>      netname = Vin-plus
>   In write-net-names-on-component. . . .
>      pin-name = 2
>      pinnumber = 2
>      pinseq = 2
>      netname = Vin-minus
> --- checking package = Q1
>     device = 2N3904
>   In write-net-names-on-component. . . .
>      pin-name = 1
>      pinnumber = 1
>      pinseq = 1
>      netname = Vout-plus
>   In write-net-names-on-component. . . .
>      pin-name = 2
>      pinnumber = 2
>      pinseq = 2
>      netname = Vin-plus
>   In write-net-names-on-component. . . .
>      pin-name = 3
>      pinnumber = 3
>      pinseq = 3
>      netname = 1
> found file and model-name for Q1
> I'll deal with the file later . . .
> --- checking package = R3
>     device = RESISTOR
> Found resistor.  Refdes = R3
>   In write-net-names-on-component. . . .
>      pin-name = 1
>      pinnumber = 1
>      pinseq = 1
>      netname = -Vcc
>   In write-net-names-on-component. . . .
>      pin-name = 2
>      pinnumber = 2
>      pinseq = 2
>      netname = 1
> --- checking package = R2
>     device = RESISTOR
> Found resistor.  Refdes = R2
>   In write-net-names-on-component. . . .
>      pin-name = 1
>      pinnumber = 1
>      pinseq = 1
>      netname = Vout-minus
>   In write-net-names-on-component. . . .
>      pin-name = 2
>      pinnumber = 2
>      pinseq = 2
>      netname = Vcc
> --- checking package = R1
>     device = RESISTOR
> Found resistor.  Refdes = R1
>   In write-net-names-on-component. . . .
>      pin-name = 1
>      pinnumber = 1
>      pinseq = 1
>      netname = Vout-plus
>   In write-net-names-on-component. . . .
>      pin-name = 2
>      pinnumber = 2
>      pinseq = 2
>      netname = Vcc
> Done writing SPICE cards . . .
>
>
> Output file is written.  We are done.
> [rob at localhost project-micSwitch]$ gnucap -b diffamp.ckt
> Gnucap 0.35
> The Gnu Circuit Analysis Package
> Never trust any version less than 1.0
> Copyright 1982-2006, Albert Davis
> Gnucap comes with ABSOLUTELY NO WARRANTY
> This is free software, and you are welcome
> to redistribute it under certain conditions
> according to the GNU General Public License.
> See the file "COPYING" for details.
> * gnetlist -v -g spice-sdb -o diffamp.ckt diffamp.sch
> Q2: model  is not a bjt
> [rob at localhost project-micSwitch]$
>
> ----------------------------------------------------------------------------------
>
> Any Ideas?
>
>
>
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>
>
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