gEDA-user: pcb insulator layer

[Peter Clifton]

On Wed, 2008-02-06 at 11:14 -0500, DJ Delorie wrote:
> > That is really black magic. How long has it done that? I've never
> > noticed!
> 
> What, putting the outline on the ps plots?  It's the age-old "draw
> outline" option, I just fixed it to draw the actual outline layer if
> you have one.

That's pretty cool. I looked at output logs for a set of gerbers
produced with a commercial PCB tool, and it seemed that they had output
gerbers which combined from multiple internal layers.

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)