gEDA-user: gEDA-dev: iverilog and Xilinx 8.2

[Stephen Williams]

Daniel O'Connor wrote:
> I now get..
> [inchoate 9:43] ~/work/fpga/SA >iverilog -y . -y 
> $XILINX/verilog/src/unisims -y $XILINX/verilog/src/XilinxCoreLib SA_test2.v
> /usr/local/Xilinx/verilog/src/unisims/DCM.v:45: syntax error
> /usr/local/Xilinx/verilog/src/unisims/DCM.v:45: error: syntax error in parameter list.
> /usr/local/Xilinx/verilog/src/unisims/DCM.v:49: syntax error
> /usr/local/Xilinx/verilog/src/unisims/DCM.v:49: error: syntax error in parameter list.
> /usr/local/Xilinx/verilog/src/unisims/DCM.v:58: syntax error
> /usr/local/Xilinx/verilog/src/unisims/DCM.v:58: error: syntax error localparam list.
> ...

Submit a bug report against devel. There is syntax in the DCM that
Icarus Verilog is not supporting. I'm surprised because I've done my
share of Xilinx FPGA work including DCMs and haven't noticed this
until now.



-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."