gEDA-user: Clearing vias (Was: Last code sprint's IRC log and pictures)

[Peter Clifton]

> There are some pictures of my current project on the net:
> http://www.cl-projects.de/projects/glcd_controller/

Inspired by the detailing around pins on that PCB, I wounder how easy it
would be to make PCB output like the attached glcd-clearances.png? (This
is a re-coloured zoom in on a couple of the pins from the above
project).

PCB's output, pcb_clearances.png shows sharp copper edges where clipping
against a polygon occurs. This can often leave thin slivers of track
which may / may not connect in production.

If its possible to detect these thin slivers and cut them out (if below
some minimum width), possible rounding their ends as shown?

Regards,

Peter C

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