gEDA-user: CPLDs and other high-density logic chips...

[Stuart Brorson]

On Sun, 3 Sep 2006, DJ Delorie wrote:

>
>> If I were to drop the CPLD and just go with an FPGA, how would I be
>> able to couple this to 5V logic?
>
> Read the Spartan docs.  For example, it is 3.3v but can drive a high
> enough Voh to meet 5v TTL input specs (~2.4v), and the inputs are also
> 5v tolerant.  They might meet your requirements.

Be careful with this, since other logic families of the name nominal
power supply level (i.e. CMOS) may require higher "input, high"
voltages.  You can mix and match *only* if you carefully examine the IO
level requirements of each part.

Stuart