> If I were to drop the CPLD and just go with an FPGA, how would I be > able to couple this to 5V logic? Read the Spartan docs. For example, it is 3.3v but can drive a high enough Voh to meet 5v TTL input specs (~2.4v), and the inputs are also 5v tolerant. They might meet your requirements. Else, OC drives with a 5v pullup might work.