gEDA-user: CPLDs and other high-density logic chips...

[Samuel A. Falvo II]

On 9/3/06, Bob Paddock <bob.paddock at gmail.com> wrote:
> > > For example, if you were to pick xilinx, and with what you have
> > > mentioned, you might want to drop the cpld,
>
> Xilinx CoolRunner family of parts are still worth looking at if low power
> is the overriding goal.

If I were to drop the CPLD and just go with an FPGA, how would I be
able to couple this to 5V logic?

I suppose I could use 74ALVT16244 chips feeding all digital inputs,
and just let the 3.3V logic direct-drive the 5V CMOS logic on the main
circuit.  However, 3-state buses would need to be split into distinct
input and output buses, thus sucking up some pins on the FPGA.  I was
just wondering if anyone had any other suggestions.

Thanks for the feedback you've given.  It's very useful.

-- 
Samuel A. Falvo II