gEDA-user: Problems with subnets containing short-circuits

[Arvid Rosén]

Stuart Brorson wrote:
> I guess I don't see how shorting around a circuit involves connecting
> two nets which don't connect to anything else.  Can you post a
> simplified version of what you are trying to do?  We can look at it
> during the code sprint.
>   
Ok, I attached two sch-files which I think illustrates the problem quite 
well.
I tried this with the gnet-geda backend, and it fails discover that 
Rtop1 and Rtop2 should be connected.
> Meanwhile, why not stick a zero ohm resistor into the shorting net,
> similar to what John suggests?   That way gnetlist has a component
> which will preserve the net. 
>
> Stuart
>   
Yeah, sure. This is no problem as long as you are aware of it. But I 
just spent one day looking for errors in my netlister-backend.
I still think this is a strange behavior.

/Arvid




>
>   
>> Stuart Brorson wrote:
>>     
>>> Just out of curiosity, why would you want to have two nets which
>>> connect to nothing other than each other?
>>>
>>> Before we label it a bug, what is the goal of this construct? =20
>>>
>>> Stuart
>>>  =20
>>>       
>> Hi Stuart!
>> That's a good question. The construct itself is quite pointless.=20
>> However, I was working on a quite complex design with two=20
>> filter-subcircuits. I wanted to test some aspects of my circuit, so I=20
>> shorted the first filter just to bypass it, which resulted in an open=20
>> circuit instead of a bypass! That is quite annoying, don't you think?
>> The possibility to bypassing stuff is always important when debugging.
>>
>> Cheers
>> Arvid
>>     
>>>  =20
>>>       
>>>> John Luciani wrote:
>>>>    =20
>>>>         
>>>>> On 7/20/06, Arvid Ros=3DE9n <arvid at softube.se> wrote:
>>>>>      =20
>>>>>           
>>>>>> However, I also tried to make a 2-pin subnet containing only a
>>>>>> short-circuit. This connection was completely ignored by gnetlist!!
>>>>>>
>>>>>> Could someone confirm this?
>>>>>>        =20
>>>>>>             
>>>>> You are correct. If you have two nets that only connect to each other
>>>>> the connection does not show up in the netlist.
>>>>>
>>>>> I get around this by connecting one of the nets to a component.
>>>>>
>>>>> (* jcl *)
>>>>>
>>>>>      =20
>>>>>           
>>>> Ok, thanks!
>>>> Shouldn't that be considered as a pretty severe bug? I am new here,=3D=
>>>>         
>> 20
>>     
>>>> maybe it's already reported.
>>>>
>>>> /Arvid
>>>>
>>>> --=3D20
>>>> Arvid Ros=3DE9n
>>>> Softube AB
>>>> Teknikringen 7
>>>> S-583 30 Link=3DF6ping
>>>> Sweden
>>>> Phone: (+46) 13 21 16 23
>>>> Mobile: (+46) 73 25 12 34 7
>>>> Mail: arvid at softube.se
>>>> URL: www.softube.se
>>>>
>>>>
>>>>
>>>> _______________________________________________
>>>> geda-user mailing list
>>>> geda-user at moria.seul.org
>>>> http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
>>>>
>>>>    =20
>>>>         
>>>
>>> _______________________________________________
>>> geda-user mailing list
>>> geda-user at moria.seul.org
>>> http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
>>>  =20
>>>       
>> --=20
>> Arvid Ros=E9n
>> Softube AB
>> Teknikringen 7
>> S-583 30 Link=F6ping
>> Sweden
>> Phone: (+46) 13 21 16 23
>> Mobile: (+46) 73 25 12 34 7
>> Mail: arvid at softube.se
>> URL: www.softube.se
>>
>>
>>
>> _______________________________________________
>> geda-user mailing list
>> geda-user at moria.seul.org
>> http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
>>
>>     
>
>
>
> _______________________________________________
> geda-user mailing list
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>   


-- 
Arvid Rosén
Softube AB
Teknikringen 7
S-583 30 Linköping
Sweden
Phone: (+46) 13 21 16 23
Mobile: (+46) 73 25 12 34 7
Mail: arvid at softube.se
URL: www.softube.se

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v 20060123 1
C 1000 4500 1 0 0 in-1.sym
{
T 1000 4800 5 10 1 1 0 0 1
refdes=3
}
C 4600 6100 1 180 0 in-1.sym
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T 4600 5800 5 10 1 1 180 0 1
refdes=2
}
C 1000 5900 1 0 0 in-1.sym
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T 1000 6200 5 10 1 1 0 0 1
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}
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C 4600 4700 1 180 0 in-1.sym
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C 2300 4500 1 0 0 resistor-1.sym
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T 2500 5000 5 10 1 1 0 0 1
refdes=R34
T 2500 4800 5 10 1 1 0 0 1
value=10k
}
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C 5000 9200 1 0 0 test.sym
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refdes=Utest
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device=test
T 5000 9200 5 10 1 0 0 0 1
source=test.sch
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C 1700 8200 1 0 0 vac-1.sym
{
T 2400 8850 5 10 1 1 0 0 1
refdes=Vin
T 2400 8650 5 10 1 1 0 0 1
value=dc 0 ac 1
}
C 3400 9900 1 0 0 resistor-1.sym
{
T 3600 10400 5 10 1 1 0 0 1
refdes=Rtop1
T 3600 10200 5 10 1 1 0 0 1
value=10k
}
C 1900 7300 1 0 0 gnd-1.sym
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C 4300 9600 1 180 0 resistor-1.sym
{
T 4100 9100 5 10 1 1 180 0 1
refdes=Rtop3
T 4100 9300 5 10 1 1 180 0 1
value=10k
}
N 3400 9500 3000 9500 4
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C 7600 9900 1 0 0 resistor-1.sym
{
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refdes=Rtop2
T 7800 10200 5 10 1 1 0 0 1
value=10k
}
C 8500 9600 1 180 0 resistor-1.sym
{
T 8300 9100 5 10 1 1 180 0 1
refdes=Rtop4
T 8300 9300 5 10 1 1 180 0 1
value=10k
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N 9000 10000 8500 10000 4
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C 8900 9100 1 270 0 resistor-1.sym
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N 9000 8200 9000 8000 4