gEDA-dev: [pcb] physical layer stack

[Stephan Boettcher]

While you are reworking the layer stack, here's one thing that would
have been useful for one of my boards, but I guess it is a long shot:

It is a rigid-fexible board with two top and bottom component layers
each.  The outer component layers were on the rigid parts, in addition
there were a few connector pads on flexible layers.

So please keep in mind that there is a case for multiple top/bottom
layers, in case it turns out there is a straight-forward way to
support that.

Obviously, there are multiple board outline layers as well.

Thanks for all the code!

Stephan

PS: I solved the problem by putting tiny vias into the connector pads
for the rats nest.  For DRC and gerber export I wrote two sed script
to remove the vias and to move the layer assingment around for each
case.

This is the board:

  http://www.ieap.uni-kiel.de/et/people/stephan/msl/eda/TFlex.zip

PPS: This is the only board where I ever used more than one PCB layer
for one copper layer.  I made separate ground plane layers for rigid
and flexible areas, in case I need to replace the plane by a mesh on
the flex areas later.


DJ Delorie <dj at delorie.com> writes:

> To move forward with some projects, PCB needs to understand more about
> the physical stackup of the board.  Harry mentioned once that the
> drawing layer stack should BE the physical layer stack.  I.e. the
> topmost copper layer in the menus should represent the component side
> copper, the next ones the inner planes, and the last one the solder
> side copper.
>
> In theory, we could invert the menus when we flip the board too ;-)
> (just kidding).
>
> Anyway, does anyone object to this type of change?
>
> The projects that need this type of conceptual change are:
>
> * The layer types thing (i.e. drawing layers can be more than "just
>   copper") (this is more of a "we should solve both problems together,
>   to avoid headaches later" issue).
>
> * Blind/buried vias.
>
> * Any type of 3-D renderer.
>
> It would also allow us to cut/paste/tile boards with different
> stackups more reliably, by canonicalizing them.  Currently, merging
> boards is sensitive to the order of layers, without regard to which
> are component/solder/inner.
>
> There was also some discussion of getting rid of the "layer groups"
> concept and forcing one drawing layer per physical layer.  I suspect
> we'd need to be able to color tagged nets differently to make up for
> this type of loss.  Thoughts?
>
>
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-- 
Stephan Böttcher                     FAX: +49-431-880-3968
Extraterrestrische Physik            Tel: +49-431-880-2508
I.f.Exp.u.Angew.Physik               mailto:boettcher at physik.uni-kiel.de
Leibnizstr. 11, 24118 Kiel, Germany