gEDA-dev: verilog-AMS

[al davis]

On Tuesday 08 May 2007, John Doty wrote:
> > On Monday 07 May 2007, John Doty wrote:
> >> Where are the Verilog-AMS models? Given no models, I
> >> *cannot* switch   from SPICE.
> >
> > I understand now.  You think we should wait until everyone
> > else has it, then copy.
>
> No. *I* *must* wait until it's usable. I have circuits to
> simulate *today*.

It won't be usable until we do it. 

> I am not opposing Verilog-AMS. Why do you think I am? Mostly
> what I'm   saying is that I won't dive into an empty swimming
> pool. 

Nobody is asking you to dive into an empty swimming pool.  I am 
just asking you to stop interfering with those who are trying 
to fill the swimming pool, and let them do it.

> There's also some skepticism at your hard sell: In a 
> long career I've seen too many universal solutions that were
> going to solve all our problems.

It's only a response to your hard sell.

> Until Verilog-AMS completely takes over, we must continue to
> support SPICE. Right now that's what's getting the work done.

Nobody is proposing to take that away.

> And yet they aren't "putting their money where their mouth
> is" by publishing Verilog-AMS models in their design centers.
> So of course there's little support from gEDA users: we have
> circuits to simulate. We can't wait for pie in the sky.

Actually they are, very seriously.  It isn't far enough along 
for you to see.

If you choose to lag behind yourself, that's your choice.  
Please don't hold up the rest of us.