gEDA-dev: gnetman inspired libgeda datastructures

[Peter Clifton]

Dear all,

Please take a look at the attached diagram for what could potentially
represent internal data structure for a libgeda which supports
concurrent netlist updates. This is still very conceptual at this stage,
and we welcome others input.

The diagram was produced by Peter Brett and Peter Clifton. (Peter Brett
will post a URL for a photo of the original white-board we were working
on). It does not yet address hierarchical buses, or mutable pins.

It is heavily influenced by Bill Cox's data structure for gnetman, as
shown here: http://www.viasic.com/opensource/programming.html

Note that in this idea, a symbol as understood presently by gEDA users
is a special case of a "circuit" with no pages. The circuit defines
external ports (pins), and in some cases may have a simplified graphical
representation (the new symbol concept). A circuit may consist of
multiple pages, but only has one netlist composed of several nets.

We consider "net" to be electrical - rather than graphical, with
"NetSegments" being the graphical representation. Similarly, "pins" are
the graphical representation of an "Mport" (master port). The Mport is
associated with the circuit representation - rather than a specific
instance of it. A "port" links the "Instance" with the actual "Mport".

It is possible to nest circuits hierarchically with the "Instance"
data-type. The graphical elements of a nested circuit will either be
represented by a symbol, or displayed verbatim (perhaps in a dashed
box). This is more of a user choice than a design question.

Because it makes more sense to associate attributes with electrical
entities such as the nets, or Mports, rather than graphical entities,
attributes will be stored as abstract data rather than graphical
constructs as at present. When text is required on a Page or Symbol (two
closely related entities), literal text may be entered, or a reference
made to attribute data from the current circuit - or lower in the design
tree.

Obviously there is a long way to go in defining this, but it would be
great to have some input from the rest of the developer community.

Just a quick note, the colour code for the diagram is:

Blue   - Core design hierarchy
Green  - Graphical elements
Yellow - Electrical elements

Is it worthwhile posting the diagram on the gEDA Wiki (perhaps under the
libgeda3 page?)

Regards,

Peter Clifton
Peter Brett

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