gEDA-dev: State of the symbols library
John Doty
jpd at wispertel.net
Sun Jul 1 19:17:17 EDT 2007
On Jun 30, 2007, at 4:41 PM, evan foss wrote:
> If you look at the this page you find basically the same bad news.
> http://www.geda.seul.org/tools/symbols/library/index.html
> Of course this is for an earlier version of the library (20040111).
> What mystifies me is how there are errors on things like the
> titleblocks. That seems to require a fix to the gsymcheck. gsymcheck
> currently can't handle title blocks correctly as it flags anything
> with out the things like device and pin attributes which don't apply.
There's a general problem with gsymcheck: whether a symbol's
attributes are correct depends on the context of the symbol's use.
Gsymcheck should be considered vaguely advisory, not definitive.
> The same sort of gsymcheck issues happen with things like the
> connector and the io parts of the library. All the other errors are
> likely legitimate. It would seem many people adding symbols have
> interest in drafting symbols only not maintaining them. Who ever did
> the xilinx stuff for example did a wonderful job of drafting all the
> chips with all of there pins but didn't define any of the pin
> attributes properly (ex. pinseq=, pin=, pinnumber=, pinlabel=).
Whether those attributes are required depends on your design flow. If
you don't use Spice you probably won't even understand what pinseq is
for. How is the drafter supposed to determine it?
Some symbols don't sensibly have footprints. What meaning, then, does
pinnumber have? How should the symbol drafter determine it? Even if
there is a footprint, note that different manufacturers can't even
agree on such simple things as how the pins on SOT-23 are numbered!
You just have to watch out.
>
> A large chunk can probably be done by fixing those gsymcheck issues
> and say writing a few through away scripts to fix things like the
> unnamed pins in the xilinx chips.
When I'm using a Xilinx chip, I want the pin names to reflect my
custom functions. The generic names are useless, pin numbers are
sufficient to identify the pins. So you cannot really fix the symbol
for me without reading the future state of my mind. ;-)
And what's the right pintype for a generic Xilinx pin?
I, for one, am grateful for submitted symbol graphics: they save me
time. It is less important to get the attributes "right" because I
have to check them carefully anyway. Even if the drafter got them
right in some context, they are often not right in mine.
Again, to me the genius of gEDA is its flexibility. The really nice
thing about having things like gsymcheck and drc2 as separate tools
is that you can use them when relevant and ignore them when not. But
perhaps we should emphasize to newbies that these make assumptions
about your design flow and application that you are largely free to
ignore as needed.
John Doty Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd at noqsi.com
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