gEDA-dev: Synopsys SWIFT interface

[Stephen Williams]

I have a recent and burning desire to add SWIFT support to Icarus
Verilog, and I'm trying to scrape up resources for this task. In
fact a few years ago I was able to *load* and start some SmartModels
using LMTV support binaries for Verilog-XL. It turns out that the
LMTV interface uses PLI-1 to interface with the Verilog run-time.

But I was unable to get a simulation to run and do anything useful
(other then print out the copyright information for the model) and
since I was at the time unable to debug it, I put the problem aside.

But now I want to return to this problem. I understand that there
are compilation tools from Synopsys, VMC in particular, that compile
models in Verilog into SmartModels that in turn link via the
SWIFT interface to the simulator. In principle, if I can access
such a tool, I'd be able to make test SWIFT models that may give
me insight into the interaction between the model and the simulator
on the other side of LMTV.

So I'm trying to find someone who has access to these tools who
can help me figure out what I need to make some test models that
help me debug my interface.

Thanks,
-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."