gEDA-dev: Re: Icarus verilog question

[Evan Lavelle]

Anthony J Bybell wrote:
> On Sun, 21 Jan 2007, Stephen Williams wrote:
> 
>> Arrays of reals are not supported in Verilog, but *I* intend to support
>> them. So any array support you add should include support for reals.

They're new in 2001:

> 3.10.2 reg and variable arrays
> Arrays for all variables types (reg, integer, time, real, realtime) shall be possible.

Of course, Verilog-2001 is part of a continuum of languages which may or
may not actually be "Verilog"... :)

> OK, no problem--I'm of the mindset that the standard isn't written in
> stone and you never know when that kind of thing would be supported in
> the future.  BTW, does Verilog support multi-dimensional arrays?  I
> haven't looked at the grammar in a while.

Also new in 2001.

Evan