gEDA-dev: verilog-AMS

[Svenn Are Bjerkem]

On 4/12/07, John Doty <jpd at wispertel.net> wrote:
>
> On Apr 12, 2007, at 9:03 AM, Dan McMahill wrote:
> > A different case is that some foundaries directly supply a "custom
> > model " for some devices that is written in verilog-a.  This is a
> > case where without at least a verilog-a capable simulator, you
> > can't even use the foundary supplied "custom model".
>
> Are there any such cases? Models/parameter sets for SPICE or
> proprietary simulators are everywhere I look.

In some of the model parameter deck for spice simulators that I have
seen, there is a parameter level=N where N is a natural number greater
than 1. This level=N parameter tells the simulator which mathematical
model it is supposed to use. I don't recall from the top of my head
which number is Eber-Moll and which is bsim1,2,3,4 etc. The higher
numbers tend to vary from simulator to simulator.

When the model is written in Verilog-A, then the model math (model
specific, bsim, psp, eber-moll, phillips etc.) is a part of the text
file(s) that builds up the model in Verilog-A together with the
parameters that you would normally find in the spice model parameter
cards (TSMC, UMC, IBM etc.)

You could look at it this way: With Verilog-A, the simulator does not
need to know the model math, with SPICE the model math is a part of
the simulator and the user can only control which model math is used
through the level=N parameter. With Verilog-A you could theoretically
go into the model math of the bsim3v3 and play around with the
formulas which would be there in readable text in the .va files.

You have to understand that Verilog-A is quite different from Verilog.
In Verilog-A you write continous expressions of current flows and
voltage differences through branches and between nodes.

A resistor would look like something like this:

I(plus,minus)) <- R*V(plus,minus)

A switch
if (position=1) begin
V(plus,minus) <- 0 // voltage difference across a connected ideal switch is 0V
end
else begin
I(plus,minus) <- 0; // current flow through an ideal open switch is 0A
end

I expect such verilog-A models to become a bit slower than the
compiled-in models as the simulator vendors are doing heavy optimizing
on the math and the matrixes themselves. On the other side, the
flexibility of a verilog-A model give some advances: With Verilog-A
models the foundries can provide their own models that will fit any
simulator that supports Verilog-A. This means that they will not have
to follow the least mean square which looks to be BSIM. The latest
BSIM models are so filled with fittings to comply with whatever
artifacts that most of the model parameters are useless for hand
calculation (so I am told from a foundry) The foundry would be happy
to give an empirical model based on their own statistical foundings.
Problem is that each foundry is doing things a little bit different
(customer added value, you know). With Verilog-A you would not need to
care at all as long as your simulator can handle the Verilog-A that
the foundry provides.

I would be happy to sacrifice a little bit of hard-core performance if
the modelling concept could be made easier. I think each foundry would
find ways to provide fast models with appropriate parameters that
would outperform a compiled-in models. And don't forget that with
Verilog-A the simulator writer can concentrate on optimizing compiling
of verilog-A, a task that he should know very well, just like the
foundry can concentrate on "mirroring" the physical properties of his
silicon into a math model, a task that he knows very well. With spice,
the simulator writer must know a lot about writing models, or the
foundry must know a lot about C or fortran programming.

> Back on the old NeXT computer system, there was a demo program that
> had a crude schematic capture front end, and a back end that wrote
> out equations in Mathematica. It was useful for things like finding
> the relation between component values that would give you critical
> damping, since Mathematica could do the analysis symbolically without
> simulating. I've thought of writing a gnetlist back end for
> Mathematica to do things like this.

A very common thing for system engineers is to do everything in
Simulink and Matlab, I think that is something similar. I think there
are some ways of converting those Matlab blocks into cadence blocks to
save some time, but also as verilog-a models. Most EDA tools are so
rigid that you do not do a lot of playing around with system
definitions inside them.

> I've done my own op-amp models on occasion. "God is in the details."
> And I don't see how a simulator can help work out the details, which
> is the time consuming part.

With op-amp models in spice you are limited to the dependent and
independent elements that spice offers. Later forks of spice offer
polynomic blocks, but these are quite incompatible across the
different forks. The Hspice fork tends to be the leading light, even
if Synopsys tries to promote the HspiceRF fork as a better
implementation because it is written in C++ instead of fortran. (of
whatever old language they used) With a verilog-A model you can use
both the structural view of "legacy" op-amp macro models and add
mathematically described (not just the coefficients of fixed polynoms)
blocks.

On the other side you are right that it takes a long time for industry
to pick up Verilog-A. I think this is due to the fact that Hspice is
no longer owned by the inventor, and the inventor of Spectre left
Cadence. So to speak is Al the only inventor who is still working on
his baby. Problem is that he has no megabucks in the back to help him
move forward, and EE's are not likely to know how to write (good)
programs.

>
> >
> > Here's hoping I managed to clarify what I've been trying to say and
> > not further confuse the situation.
> >
>
> It's helpful. Pardon my skepticism: I'm a scientist, it's part of the
> job description ;-)

Yeah, the same scientists are the ones that make flights into space
possible. How come openness to new thoughts in one area is so isolated
from the conservatism in other areas? Example: put little  vehicles on
Mars with chips made in spice? Maybe it is the Navigators that are
behind it all? The spice must flow...

-- 
Svenn