gEDA-dev: Re: Icarus Verilog 0.8 - Bug(?)

[Stephen Williams]

Ronny Obstei wrote:
> Hi Stephen Williams,
> First of all, respect to your tool!
> 
> I got a problem with a for-loop, as you will see in the attached module. The 7th for-loop does not execute it's body. Could you eventually tell me why, or what I do wrong?

Looks like a bug in handling the signed-ness. The devel trunk gets
it wrong as well. Can you report this in the bugs database for me?

-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."