gEDA-dev: Numerical analysis of circuit boards

[Scott Dattalo]

On Sat, 2006-08-26 at 12:15 +0200, Tomaz Solc wrote:
> Hi everyone
>
> I'm working on a piece of software that can numerically calculate
> various electrical properties of traces on a printed circuit board.
> Currently it is able to calculate capacitances between traces and output
> them in a SPICE-friendly form that can for example be added to the
> circuit simulation. It can also calculate peak electrical field values
> and trace resistances (although that is a bit inefficient at the
> moment). It may also be possible to calculate inductance and
> transmission line parameters with some modification, but I haven't
> looked into that yet.

Hi Tomaz,

I'd be interested in your code.

What techniques are you using? Also, how do you validate your results?

The times I've needed trace capacitance estimates I've used FastCap.
However, instead of extracting PCB parameters and creating the FastCap
finite element model, I only created FE models for those areas of interest
in the PCB. This was useful for performing parametric analysis (like
measuring the effect of parasitic capacitive coupling as a function of
trace spacing between two nodes), but difficult to create new models. In
addition, I never really could satisfactorily model the FR4 dielectric.

Another technique I've seen used is a simple parallel plate modeler. This
is a first-order capacitance solver that extracts the copper geometry from
a gerber (or whatever), and estimates capacitive coupling between nodes
using the A/d formula. However this technique is not too accurate for
geometric shapes with large aspect ratios (like traces!). Furthermore, the
"second order" effects due to nearby nodes is very significant.

Scott