Re: gEDA-dev: layers and layer groups

[der Mouse <mouse@xxxxxxxxxxxxxxxxxxxxxx>]

>> That was my impression - so it seems a bit odd to group silk and
>> copper together (which is how it seems to be done in both
>> thermal.pcb and tut1.pcb, the two files I've been using as test
>> cases).
> [...]

So, would it be fair to say that the layers are 0..max_layers-1, with
some places where layer numbers can appear giving special-case
semantics to the otherwise invalid values max_layers and max_layers+1?

/~\ The ASCII				der Mouse
\ / Ribbon Campaign
 X  Against HTML	       mouse@xxxxxxxxxxxxxxxxxxxxxx
/ \ Email!	     7D C8 61 52 5D E7 2D 39  4E F1 31 3E E8 B3 27 4B


_______________________________________________
geda-dev mailing list
geda-dev@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev