Re: gEDA-dev: [pcb] thin lines for assembly layer?

[DJ Delorie <dj@xxxxxxxxxxx>]

> How much work do you think it really would be to allow ElementLine
> and ElementArc to have a flag which specifies a layer and to support
> multiple annotation layers this way?

Adding the syntax for a flag, parsing it, and storing the value is, I
think, easy.  Doing something useful with it is the tricky part.

The quick hack is to Just modify the drawing code to look for a few
key flags just to do annotations.  I think this would be simplified by
the fact that you can't *edit* those layers; it's only the Element*
stuff that provides them, so we don't have to change the generic
DrawLayer code.  But it would also give us, perhaps, per-element
anti-mask support, with little extra work beyond this.

The tricky part there would be the code to break up and rebuild
elements wrt the paste buffer.  When we break up an element, we have
to put the lines and arcs somewhere, but where?  And how do we
preserve the flags?

To do it right, we need to implement the layer types change.  By this,
I mean we need to have a *real* type assigned to each layer, settable
by a GUI of sorts.  I've talked about this before off-list.  This
requires modifying the drawing code and the HIDs to support it; the
drawing code needs to figure out what to do with each layer and how to
draw it, and the HIDs need the GUI support.  I don't think the
exporters need changes; they already know how to do the fundamentals
we need.

We already have some code for using the layer *name* for special
purposes, like "outline" for the outline.  We'd have to take this out
and replace it with the new layer type.  Also, the autorouter should
know about keepout and outline layers, and perhaps antimask (don't
want to place traces where they'd be exposed).

Then we have to figure out a standard for mapping flag names to layer
types.


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