Re: gEDA-dev: [pcb] thin lines for assembly layer?

[DJ Delorie <dj@xxxxxxxxxxx>]

> Maybe it's an option to add a "NOPLOT" flag (0x1****** ... or some other
> value ) to this thin line of 0.01 mil, as to not plot it in the gerber
> files for front/back silk etc.
> 
> This flag could be used for other stuff as well.
> 
> This wouldn't break the file format and could easily be implemented,

That would be a useful flag to add to the ElementLine and ElementArc
entries, to allow us to specify a layer (perhaps by name, perhaps by
type) other than the default "silk".

> that is, if there a spare bit "left over" in the flag byte.

We switched to named flags to avoid that problem :-)

The flags "byte" is already an int plus two arrays (one for thermals,
one for pip).


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