Re: gEDA-dev: Re: Icarus Verilog for post synthesis simulation

[Stephan Boettcher <boettcher@xxxxxxxxxxxxxxxxxx>]

GÃnter Dannoritzer <dannoritzer@xxxxxx> writes:

> I tried to compile iSDF 0.2.1 with the latest development snapshot of
> Icarus (verilog-20060618) and it does not compile.

I am not surprised.

At that time, ivl was not looking at specify timing at all, so that
iSDF needed to do a lot of dirty tricks to produce the delay paths to
annotate.  Obviously, this was not going to survive a few years of
development.

When ivl/vvp does support the specify delays, SDF annotation becomes a
lot easier.  That is were I'd spend some time on, if I had any.

Stephan

-- 
Stephan BÃttcher                     FAX: +49-431-880-3968
Extraterrestrische Physik            Tel: +49-431-880-2508
I.f.Exp.u.Angew.Physik               mailto:boettcher@xxxxxxxxxxxxxxxxxx
Leibnizstr. 11, 24118 Kiel, Germany


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