Re: gEDA: Problems with connection scanning

[Karel Kulhavý <clock@twibright.com>]

On Sun, Aug 08, 2004 at 01:57:46PM -0400, Dan McMahill wrote:
> On Sun, Aug 08, 2004 at 02:27:45PM +0000, Karel Kulhav? wrote:
> > > > Sometimes these pieces were thinner than minimum width etc.
> > > > 
> > > > They said these small triangles can peel off, float in the bath and stick
> > > > somewhere else and cause a short-circuit. So I broke the polygons on each
> > > > such a tiny piece and replaced with several smaller polygons that didn't
> > > > cover the area the tiny piece existed.
> > > 
> > > ah.  I know what you mean.  PCB currently does not perform any
> > > "island removal".  Some commercial tools have a feature where you can specify
> > > a minimum copper area for any polygon.  If after a copper pour, there are any
> > > small isolated area with an area less than the threshold, they are removed.
> > 
> > This is of no use. The islands are often big with problematic whiskers etc.
> > What would be more interesting would be to specify more general logical
> > function dependent on whether the island is connected somewhere , what is
> > it's minimum/maximum width etc.
> 
> This is probably somewhat a result of the technique used by PCB.  PCB basically
> punches holes in a polygon.  What some other tools do is to use a circular
> aperture, say 10 mils, and draw in the fill.  That technique has the advantage
> of never creating "whiskers" in the first place.  A very bare bones algorithm is
> basically do a scan across the board and turn on the aperture whenever doing so
> would a) produce copper inside the fill area and b) not cause a DRC violation or
> short.  The refinement which probably takes a lot more work is to follow up 
> that scan step with something which traces the outline of all the filled areas
> with the fill aperture to clean up the bumpy edges you get from the first step.
> I don't think you have to implement a fill this way to get the same effect though.

I like the PCB algorithm because
1) The output looks cool and sharp
2) It's distinctively visible you have designed the PCB in PCB and not
something commercial ;-)
3) What it does is what it was exactly meant to do - leave out areas where
DRC clearance would be violated
4) Doesn't have any inherent constant inside
5) Must generate much smaller output because instead of lots of complicated
shapes, only primitives combined using logical operators are used.
6) Doesn't approximate anything.
7) I have spent some time fucking off one manufacturer that said he supports
Gerber RS274X and in fact didn't support it because he did it this way:
a) import RS274X into some commercial PCB editing tool
b) do some crosshairs etc.
c) export into their format
It seemed all softwares of all other customers didn't do the trick that
PCB does, because his software ignored the information about polarity
in the step a) so the result was total bogus. And also the second firm
I contacted made the whole thing without problem. It means that it isn't
a real problem. And I have also a warm cozy feeling the firm #1 lost two
big orders for about 70000 CZK total (that's about 2670 USD) due to this fact.
The order was placed by the firm #2 instead :) At least sometimes lying doesn't
pay off ;-)

> > For example some board have tons of tiny squares that are not connected
> > together to perform coverage equalization, copper savings etc. My manufacturer
> > didn't want any such thing. It's probably necessary only in very big series or
> > in some extra cheapo processes or I don't know what. I can see it on PCI cards.
> 
> I've often times placed a pattern of 0.040" square pads on a 0.050" grid in 
> unused area on a board.  It can be quite useful on a prototype board when
> you decide you need just one extra circuit that wasn't part of the original
> design...

So that the pads aren't covered by soldermasks and the spces between them
are?

Cl<