Re: gEDA: Problems with connection scanning

[Karel Kulhavý <clock@twibright.com>]

> > Sometimes these pieces were thinner than minimum width etc.
> > 
> > They said these small triangles can peel off, float in the bath and stick
> > somewhere else and cause a short-circuit. So I broke the polygons on each
> > such a tiny piece and replaced with several smaller polygons that didn't
> > cover the area the tiny piece existed.
> 
> ah.  I know what you mean.  PCB currently does not perform any
> "island removal".  Some commercial tools have a feature where you can specify
> a minimum copper area for any polygon.  If after a copper pour, there are any
> small isolated area with an area less than the threshold, they are removed.

This is of no use. The islands are often big with problematic whiskers etc.
What would be more interesting would be to specify more general logical
function dependent on whether the island is connected somewhere , what is
it's minimum/maximum width etc.

For example some board have tons of tiny squares that are not connected
together to perform coverage equalization, copper savings etc. My manufacturer
didn't want any such thing. It's probably necessary only in very big series or
in some extra cheapo processes or I don't know what. I can see it on PCI cards.

Cl<
> 
> -Dan
> 
> --