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Re: gEDA: possible change, feedback desired
On Tue, Aug 07, 2001 at 01:38:58AM +0200, Magnus Danielson wrote:
> After synthesis you are flat anyway. There is no point in hierarchy
> then, at least it is not very big as far as todays routines go. Before
> synthesis is another mater.
The synthesis tool can put hierarchy in the EDIF, which helps when
applying constraints in the P&R tool. eg in Xilinx
area_group my_widget_area loc = clb_r1c1:clb_r5c5;
inst my_top/my_blah/my_widget area_group = my_widget_area ;
Hamish
--
Hamish Moffatt VK3SB <hamish@debian.org> <hamish@cloud.net.au>