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Re: gEDA-dev: "make check" in gnetlist
Hi,
They are probably commented out because the there is a name clash between the Verilog and VHDL symbols. Since gnetlist looks in the order of the list of component directories in the system-*rc files, it will pick up the wrong ones. Fixing this requires a gafrc that flushes the search list, then only adds the Verilog library or the VHDL library as appropriate, one each for both kinds of test.
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Mike Jarabek
FPGA/ASIC Designer, DSP Firmware Designer
http://www.sentex.ca/~mjarabek
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-----Original Message-----
From: Stuart Brorson <sdb@xxxxxxxxxx>
Date: Sun, 29 Apr 2007 18:29:41
To:gEDA developer mailing list <geda-dev@xxxxxxxxxxxxxx>
Subject: Re: gEDA-dev: "make check" in gnetlist
On Sun, 29 Apr 2007, Dan McMahill wrote:
> Stuart Brorson wrote:
>> Guys,
>>
>> Running "make check" in gnetlist fails. The reason is that some of
>> the tests check vhdl and verilog back-end functionality. However,
>> system-gafrc disables then by default.
>
> I thought it was due to the bug in the testsuite that Ales knows about. I'll
> try to find some time to take another look.
>
>
>> Ummmm, is there any good reason these back-ends are commented out in
>> system-gafrc? If not, I'll enable then again so "make check" works.
>>
> backends or symbol libraries?
The thing is, if I uncomment the two libraries, "make check" runs to
completion. That's why I wonder why the two libraries are commented
out in system-gafrc.
Stuart
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