Re: gEDA: Icarus verilog synthesis issue

[Stephen Williams <steve@xxxxxxxxxx>]

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David Howland wrote:
> Hmm,
> It was occurring because I was missing "functor:synth" in my ivl config
> file.  Anyone fill me in to exactly what that is for?

Well, the proper way to integrate your own code generator is
to create a foo.conf file and plop that into the /usr/lib/ivl
directory. Look at some of the .conf files that are there.
And a stub-s.conf file that I use for testing is here:

functor:synth2
functor:synth
functor:syn-rules
functor:cprop
functor:nodangle
- -t:dll
flag:DLL=stub.tgt

Once you have your foo.conf in /usr/lib/ivl, drop your foo.tgt
file into that same /usr/lib/ivl directory, and invoke it with
the command:  iverilog -tfoo ...

Now isn't that much more pleasant?-) A tip: since your target
is for synthesis only, create a foo.conf and a foo-s.conf that
are identical, and plop them both in the lib/ivl directory. The
foo-s.conf is used if you say "iverilog -S", and the foo.conf
is used if you do not use the -S flag.

- --
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."
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